Jennifer B. Sartor

Assistant Professor (20%)
Department of Informatics and Applied Informatics
Software Languages Lab
Vrije Universiteit Brussel
Pleinlaan 2
B-1050 Brussels, Belgium

Email: jennifer (dot) sartor (at)

Post-Doctoral Researcher (working with Lieven Eeckhout)
Electronics and Information Systems
Ghent University/Universiteit Gent
Sint-Pietersnieuwstraat 41
B-9000 Gent, Belgium

Email: jennifer (dot) sartor (at)

PhD Graduate from University of Texas at Austin
[formerly a post-doc at Ecole Polytechnique Federale de Lausanne]

My Curriculum Vitae

Webpage for my Multicore Programming class at VUB, Spring 2016

Webpage for my C++ class at Howest in Kortrijk, Fall 2014

Research Interests

Keywords: Managed languages; memory efficiency; memory abstraction; memory management; dynamic optimization; software-hardware co-design

The programming language and underlying hardware determine application performance, and both are undergoing revolutionary shifts. As applications have become more sophisticated and capable, programmers have chosen managed languages in many domains for ease of development. These languages abstract memory management from the programmer, which can introduce time and space overhead but also provide opportunities for dynamic optimization. Optimizing memory performance is in part paramount because hardware is reaching physical limits. Recent trends towards chip multiprocessor machines exacerbate the memory system bottleneck because they are adding cores without adding commensurate bandwidth. Both language and architecture trends add stress to the memory system and degrade application performance.

I exploit the language abstraction to analyze and optimize memory efficiency on emerging hardware. In my previous work, we show that the memory abstraction in managed languages is not just a cost to be borne, but an opportunity to improve space and time efficiency and overcome the memory wall. We enhance the productivity and performance of ubiquitous managed languages on current and future architectures.

In broader terms, I am interested in studying more efficient ways for the application, compiler and runtime system, operating system, and underlying architecture to cooperate for optimal system performance. In particular, each layer of this stack has its own method of memory management that can be limited by its narrow view: there should be more coordination to inform dynamic optimization and overcome the high overheads of memory system performance.

Here is the link to get Jikes working on the Sniper simulator.


Conferences and Journals

  • C. Gonzàlez-Àlvarez, J.B. Sartor, C. Àlvarez, D. Jimènez-Gonzàlez, and L. Eeckhout. MInGLE: An Efficient Framework for Domain Acceleration using Low-Power Specialized Functional Units. ACM Transactions on Architecture and Code Optimization (TACO), April 2016. Pdf version of paper
  • S. Akram, J.B. Sartor, and L. Eeckhout. DVFS Performance Prediction for Managed Multithreaded Applications. IEEE Symposium on Performance Analysis of Systems and Software (ISPASS), Uppsala, Sweden, April 2016. Pdf version of paper
    ---Nominated for ISPASS's Best Paper Award
  • S. Akram, J.B. Sartor, K. Van Craeynest, W. Heirman, and L. Eeckhout. Boosting the Priority of Garbage: Scheduling Collection on Heterogeneous Multicore Processors. ACM Transactions on Architecture and Code Optimization (TACO), April 2016. Pdf version of paper
  • M. De Wael, S. Marr, J. De Koster, J.B. Sartor, and W. De Meuter. Just-in-Time Data Structures. Onward! 2015 as part of Conference on Systems, Programming, Languages and Applications: Software for Humanity (SPLASH), Pittsburgh, October 2015. Pdf version of paper
  • C. Gonzàlez-Àlvarez, J.B. Sartor, C. Àlvarez, D. Jimènez-Gonzàlez, and L. Eeckhout. Automatic Design of Domain-Specific Instructions for Low-Power Processors. International Conference on Application-specific Systems, Architectures and Processors. (ASAP), Toronto, Canada, July 2015. Pdf version of paper
    ---Won Best Student Paper Award
  • J.B. Sartor, W. Heirman, S.M. Blackburn, L. Eeckhout and K.S. McKinley. Cooperative Cache Scrubbing. International Conference on Parallel Architectures and Compilation Techniques (PACT), pages 15-26, Edmonton, Alberta, Canada, August 2014. Acceptance Rate = 26%. Pdf version of paper Powerpoint presentation given at PACT
    ---Nominated for PACT's Best Paper Award
  • C. González-Álvarez, J.B. Sartor, C. Álvarez, D. Jiménez-González, and L. Eeckhout. Accelerating an Application Domain with Specialized Functional Units. ACM Transactions on Architecture and Code Optimization (TACO) , Vol 10, No 4, Article 47, Dec 2013. Pdf version of paper
  • K. Du Bois, J.B. Sartor, S. Eyerman, and L. Eeckhout. Bottle Graphs: Visualizing Scalability Bottlenecks in Multi-Threaded Applications. ACM SIGPLAN 2013 Conference on Object Oriented Programming, Systems, Languages and Applications (OOPSLA), pages 355-372, Indianapolis, Indiana, October 2013. Acceptance Rate = 26%. Pdf version of paper
  • K. Du Bois, S. Eyerman, J.B. Sartor, and L. Eeckhout. Criticality Stacks: Identifying Critical Threads in Parallel Programs using Synchronization Behavior. International Symposium on Computer Architecture (ISCA), pages 511-522, Tel-Aviv, Israel, June 2013. Acceptance Rate = 19%. Pdf version of paper
    ---Received HiPEAC Paper Award
  • J.B. Sartor, and L. Eeckhout. Exploring Multi-Threaded Java Application Performance on Multicore Hardware. ACM SIGPLAN 2012 Conference on Object Oriented Programming, Systems, Languages and Applications (OOPSLA), pages 281-296, Tucson, Arizona, October 2012. Acceptance Rate = 25%. Pdf version of paper   OOPSLA presentation
  • X. Yang, S.M. Blackburn, D. Frampton, J.B. Sartor, and K.S. McKinley. Why Nothing Matters: The Impact of Zeroing. ACM SIGPLAN 2011 Conference on Object Oriented Programming, Systems, Languages and Applications (OOPSLA), pages 307-324, Portland, Oregon, October 2011. Acceptance Rate = 37%. Pdf version of paper
  • J.B. Sartor, S.M. Blackburn, D. Frampton, M. Hirzel, and K.S. McKinley. Z-Rays: Divide Arrays and Conquer Speed and Flexibility. ACM SIGPLAN 2010 Conference on Programming Language Design and Implementation (PLDI), pages 471-482, Toronto, Canada, June 2010. Acceptance Rate = 20%. Pdf version of paper   Arraylet Patch for Jikes 3.0.1   PLDI presentation
  • J.B. Sartor, M. Hirzel, and K.S. McKinley. No Bit Left Behind: The Limits of Heap Data Compression. The 2008 International Symposium on Memory Management (ISMM), pages 111-120, Tucson, Arizona, June 2008. Pdf version of paper
    ---Received conference's Best Presentation Award


  • J.B. Sartor, S. Venkiteswaran, K.S. McKinley, and Z. Wang. Cooperative Caching with Keep-Me and Evict-Me. The Ninth Annual Workshop on Interaction between Compilers and Computer Architectures., pages 46-57, San Francisco, California, Feb. 2005. Pdf version of paper Ps version of paper

Technical Reports

  • S. Fytraki, O. Kocberber, E. Vlachos, J.B. Sartor, B. Grot, B. Falsafi. BugSifter: A Generalized Accelerator for Flexible Instruction-Grain Monitoring. Technical Report 187154 at École Polytechnique Fédérale de Lausanne, 2012. Extended Report pdf
  • J.B. Sartor, M. Hirzel, and K.S. McKinley. No Bit Left Behind: The Limits of Heap Data Compression. Technical Report TR-08-17 at The University of Texas at Austin, 2008. Extended Report pdf

Awards and Service

  • Awarded a research project grant for 2 new PhD students by FWO (Flanders Research Fund) (13% acceptance rate)
  • Invited to teach at Virtual Machines Summer School 2016 in Cumberland Lodge, UK.
  • Awarded inter-university VUB-UGent Alliance, June 2015.
  • Have served on/been invited to serve on the following program committees: ISMM 2011, ICOOOLPS 2011, SSPA 2012, IISWC 2012, CGO 2013, ISMM 2013, OOPSLA 2013, SPLASH Doctoral Symposium 2013, PPPJ 2013, IBM Journal of Research and Development manuscript review 2013, Science of Computer Programming Journal manuscript review 2013, CGO 2014, OOPSLA ERC 2014, MSPC 2014, PPPJ 2014, ISMM ERC 2014, Software: Practice and Experience Journal manuscript review 2014, CGO 2015, ASPLOS 2015, PLDI ERC 2015, ISMM ERC 2015, HPCA ERC 2015, ISCA ERC 2015, VEE 2015, TACO manuscript review 2015, Software: Practice and Experience Journal manuscript review 2015, HPCA ERC 2016, ECOOP 2016, ICPP (Programming Models and Languages Area) 2016, ISMM ERC 2016, ICOOOLPS 2016, Micro ERC 2016
  • Served as Chair of The International Symposium on Code Generation and Optimization (CGO)'s ACM Student Research Competition, and evaluator of Grand Finals, 2015
  • Invited and served as the Students Chair for CGO, 2015
  • My student won ASAP's Best Student Paper Award for "Automatic Design of Domain-Specific Instructions for Low-Power Processors" paper, July 2015
  • Nominated for PACT's Best Paper Award for "Cooperative Cache Scrubbing" paper, June 2014
  • Invited to present 1-day class on hot IT Trend: The Move to Multicore and Heterogeneous Hardware, at The Hogeschool West-Vlaanderen to Master's students, April 2014
  • Invited and served on ACM SIGPLAN's Programming Languages Software Award committee, Feb 2014
  • Helped Professor Koen De Bosschere edit the HiPEAC Vision Roadmap for 2013, 2015.
  • HiPEAC Paper Award for "Criticality Stacks" paper, June 2013
  • First place in poster and presentation rounds in the graduate student category of ACM Student Research Competition at PLDI conference, June 2009
  • Best student presentation at The International Symposium on Memory Management for "No Bit Left Behind" paper, June 2008
  • NSF graduate student award for East Asia and Pacific Summer Institute in Australia. While visiting, gave research talks at Australian National U, U Melbourne, and U New South Whales, Summer 2008
  • UT Computer Science Teaching Assistant Excellence Award, Fall 2003


Ph.D. in Computer Science
University of Texas at Austin, Aug 2010
Advisor: Kathryn McKinley
Co-advisor: Steve Blackburn


In my dissertation, I studied the sources of memory inefficiencies on two levels: heap data and hardware storage traffic. Finding that arrays are a dominant source of heap inefficiency, I designed and implemented z-rays, a flexible, time and space efficient layout of arrays. When analyzing traffic to main memory, I found a large majority of the traffic is useless. I designed a software-hardware cooperative optimization that invalidates data in cache based on passed-down program semantics in order to eliminate useless traffic. These techniques improve memory system efficiency and performance.

M.S. in Computer Science
University of Texas at Austin, Dec 2004

Study in Computer Science Education
University of Texas at Austin, Aug 02 - Dec 03

B.S. in honors Computer Science and Mathematics, minor in Spanish
University of Arizona, Dec 2001

Teaching Experience

Vrije Universiteit Brussel, Computer Science, in Brussels, Belgium, Professor teaching Multicore Programming in Spring 2015, 2016
I teach multicore programming to masters students, including the concepts of parallelism and concurrency, in the context of three different programming languages: Erlang, Clojure, and Java, including three class projects and an oral final exam.

De Hogeschool West-Vlaanderen Industriële Wetenschappen in Kortrijk, Belgium, Lecturer teaching C++ Computer Programming in Fall 2012, 2013, 2014
I organized and taught 18 hours of C++ to masters students as an introduction to the GPU graphics programming course, including weekly programming assignments, labs with exercises, and a final exam.

University of Texas at Austin, Assistant Instructor teaching Introduction to Computer Programming: C++, Fall 2009 and Spring 2010
I designed a course to introduce the C++ language to students who had prior programming experience in other languages. I taught the 1 credit semester class focusing on the details of C++, including weekly programming assignments and quizzes.

University of Texas at Austin, Graduate Teaching Assistant Fall 02 - Spring 04
I was a teaching assistant for the following classes under Dr. Steve Keckler: Honors Computer Organization and Honors Computer Architecture, and under Dr. Roger Priebe: Computer Fluency and Elements of Computing and Programming. I received annual TA Excellence Award from department of CS under Dr. Keckler. I taught the building blocks of computer systems, architecture fundamentals, introductory programming in Java, and the basics of computing to non-majors.

Work Experience

IBM TJ Watson, Research Intern in The Dynamic Optimization Group, June - Dec 2007
At IBM, I worked on a project to optimize page faults in memory-constrained environments through the cooperation of the garbage collector and operating system by changing how the collector traverses and organizes objects.

Intel Corporation, Research Intern in The Managed Runtime Division, June - Dec 2005
At Intel, I was trying to make a Java virtual machine cache-coherent non-uniform memory access (cc-NUMA) aware with dynamic profile-guided object migration. We used hardware performance monitors to inform migration of objects between threads with the garbage collector.

Sun Microsystems Intern in The Directory Server Group, Summer 2003
At Sun, I developed a system management prototype web application using Jato and Lockhart framework that was able to install and manage server software.

Research Projects and Groups


  • I ran 2 half-marathons in Austin, Texas. I have participated in several sprint triathlons beginning in May 2008, and an olympic triathlon in May 2010.
  • I earned my black belt in Kung Fu in December of 2006.
  • I have been to every continent and have traveled extensively, as I enjoy the thrill of discovering new cultures and places.
  • Some of my other hobbies include hiking, kayaking, camping, dancing, scuba-diving, yoga, and rock climbing.