Homepage of Wim Heirman

Welcome to the homepage of Wim Heirman. Since August 2003, I am working as a researcher, first as a Ph.D. student, and since July 2008 as a post-doc, at the Hardware and Embedded Systems (HES) research unit of the Parallel Information Systems (PARIS) group, which is part of the Electronics and Information Systems (ELIS) department of Ghent University in Belgium.

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Contents: Contact Information | Research Interests | Publications | Personal Interests
Quick links: My PhD thesis | Publications | Photos

The OptiMMA project will enable the mapping of emerging, dynamic software applications on complex Multi-Processor Systems-on-Chip (MP-SoC). This will be achieved through the use of Middleware components, which will be able to mediate between embedded software and the hardware platforms. Thus, they manage at run-time the memory storage, energy consumption, bandwidth and computation resources of the embedded system. Modeling and customization of the Middleware components is a key element of the OptiMMA project. It will create a broad user base and enables the valorization of the results among a wide body of economic actors in Flanders.

The OptiMMA project is funded by IWT Vlaanderen, the Institute for the Promotion of Innovation by Science and Technology in Flanders.

The enormous computing power of multi-processor systems and manufacturing tools now on the drawing table will require data transfer rates of over 100Terabit/s. These data rates may be needed on-chip, e.g. in multicore processors, which are expected to need total on-chip data rates of up to 100TB/s by 2015, or off-chip, e.g. in short distance data interconnects, requiring up to 100TB/s over a 10m to 100m long distance. The only viable technology for transmitting this level of information is using optical interconnects. Besides a huge data rate, optical interconnects also allow for additional flexibility through the use of wavelength division multiplexing. This additional flexibility may be employed for the realization of more intelligent interconnect systems, such as the optical network-on-chip system also investigated in this project.

WADIMOS will build a complex photonic interconnect layer incorporating multi-channel microsources, microdetectors and different advanced wavelength routing functions directly integrated with electronic driver circuits and demonstrate the application of such electro-photonic ICs in two representative applications, an on-chip optical network and a terabit optical datalink.

The WADIMOS project is funded by the European Communion's Seventh Research Framework Programme (FP7).

Electrical interconnection networks are being replaced by optical ones on ever shorter distances. Recent advances in inter-chip optical interconnection technologies will allow us to build tightly coupled, optically connected multiprocessor machines in the very near future. Currently, optical technologies like Myrinet and Fiber Ethernet are building blocks for large clusters, based on the message passing paradigm. The higher bandwidth, lower latency and reconfigurability of inter-chip optics (that is, directly between the digital VLSI components, avoiding slow, power-hungry and EMI-plagued electrical pins and PCBs) will allow us to build faster machines that provide a shared memory environment.

My part in this was to investigate which of the many possible optical interconnection architectures can benefit a shared memory multiprocessor, and thus finding out how the next generation of machines like the Sun Fire and SGI Altix servers may look like. Most of this task was done by simulation of the various architectures. I have set up an evaluation environment consisting of the full-system simulator Simics and the SPLASH-2 benchmarks as a workload. Since Simics only does functional simulation, I wrote a number of extension modules that model a cache-coherent, non-uniform memory access model (ccNUMA) architecture. Since these simulations take a long time, I have also looked at ways to predict performance based on network parameters, without the need for a full simulations. This is especially usefull for network designers so they can do quick design space explorations.

On July 9, 2008, I defended my Ph.D. thesis on this subject, “Reconfigurable optical interconnects in shared-memory multiprocessor systems.” The complete text, a summary and more can be found on this page.

This work was being done as part of the IAP-V 18 PHOTON and IAP-VI 10 photonics@be networks, sponsored by the Belgian Science Policy Office.